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Micron Sees Memory Everywhere

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January 2016 – Rob Peglar of Micron spoke at the Storage Visions event in Las Vegas on directions in computer memory and how the future will address new approaches for both active memory and storage.  The shift is in part due to the ubiquity of mobile devices that have brought a realization to the thin client computing architecture.  This computing realization is a bit of a “back to the future” scenario bringing this 1970’s & 80’s era architecture to current installations.  This retro-architecture is also bringing a revival in “optimal coding” and what languages to use for these data processing tasks which are service

The talk moved on to cover three key trends in memory and memory use – (1) The enterprise is moving to Software Defined Everything; (2) 2016 is the start of the end of the SAN and (3) 2016 is the start of the end of the HDD.  These trends are observed from the perspective of a semiconductor memory manufacturer and are focused on the active data memory rather than archive.  These trends are driven by todays workloads which are trying to optimize the $/GB/Sec processed in Memory. 

Technology is in place for these trends – SDS (Software Defined Storage) and SDN (Software Defined Networking) have been around since 1999.  In the past 17 years, it is has progressed from an outlier tools to mainstream.  To go along with this, SANs are disappearing and moving from channel based solutions (SAS/FC/etc) and shifting to IP based and Ethernet based solutions.  This is the rise of the “server SAN” which is a host to host methodology.  In this situation the host is just a node in the area network and the servers are typical bare metal platforms with hypervisors supporting the SDN and NFV functionality.


Micron 3D NVM presentation at Storage Visions 2016

 

To address these higher densities applications and higher performance memories, NAND FLASH is migrating to 3D architectures vs Planar semiconductor processing. In server applications, HDD storage is about 100,000X slower at getting data to the CPU, when using a traditional ATA interface than system DRAM.  To accelerate things, current systems utilize a 2D Hybrid solution, such as NVDIMM (DRAM and NAND Flash).  These solutions are still present about an 80X difference in the CPU accessing high capacity data from the NVDIMM vs active FLASH based storage through a PCIe, SAS or SATA Interface.   The future will see the rise of #D NVM solutions directly connected to the CPU with high capacity.  These solutions represent a 5x-20x overhead with a DDR or PCIe interface over DDR4 based DRAM and will fill the gap between the cost, density and performance required for modern servers and applications. 


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